Turning Complex IP into Verified Silicon

Design Verification Engineer with 3.5+ years of hands-on experience verifying complex IP across RTL and gate-level domains. Delivered end-to-end verification for DDR, USB PD Controller, and RTC IPs, identifying 30+ silicon-critical bugs and achieving >95% coverage closure. Proficient in Synopsys VCS, Verdi, Cadence Xcelium, vManager and ModelSim, with Bash/Python scripting that cuts debug cycles by 30–40%.

30+ silicon-critical Bugs found

>95% Functional Coverage

20–30% faster GLS debug

3 Client projects delivered

6 Junior Engineers mentored

Trained 36 Trainees

Contact

Location: Dhaka, Bangladesh

Phone: +880 1836 232 647

Email: md.kamrul.islam20feb@gmail.com

LinkedIn: mdkamrulislam20

Facebook: mdkamrulislam20

Professional Experience

Ulkasemi Pvt. Limited — Dhaka, Bangladesh

Feb 2022 → Present

Trainee Engineer (Feb 2022–May 2022) → Assistant DVE (Jun 2022–Dec 2023) → Design Verification Engineer (Jan 2024–Dec 2024) → Senior DVE (Jan 2025–Present)

DDR5 MRPHY GLS-based Verification (Client) · Nov 2024 – Present

Ran multi-corner GLS regressions; resolved 20+ timing, X-propagation, and functional issues for tape-out.
Enhanced UVM testbenches; drove coverage closure.
Produced optimized VCDs for power analysis; automated flows to cut GLS debug by 30–40%.

GLS Readiness & Testbench Refactoring (Client) · Aug 2024 – Nov 2024

Re-engineered UVM testbench for gate-level; uncovered 12 latent netlist bugs, improved QoR.
Bash-driven CI regressions; ~50% less manual setup and nightly runs.
Partnered with design to root-cause 12+ GLS failures; ~30% faster debug.

Real-Time Clock (RTC) IP Verification (Internal) · Nov 2023 – May 2024

Test plans, coverage models, assertions; 90% functional / 100% code coverage (waivers).
Reusable UVMF with UVM RAL; 25+ bugs caught; ~30% faster verification.

USB Power Delivery (PD) Controller (Client) · Sep 2022 – Jul 2023

Robust UVM environment; 100+ constraint-random tests across RTL/GLS.
Global checkers/scoreboards; 25+ functional bugs; first-silicon success.
GLS with Cadence Xcelium across SDF corners; regressions in vManager.

Wishbone-I2C & AMBA APB/AHB (Training) · Mar 2022 – Aug 2022

Multi-agent UVM testbench for Wishbone-I2C; single-agent benches for AMBA APB/AHB.
Detailed test & coverage plans; >90% functional coverage.
Python-automated regressions; ~30% shorter cycles.

Skills

Verification Concepts

Functional Verification
Gate Level Simulation (GLS)
Assertion-Based Verification

Methodologies & Languages

SystemVerilog
Verilog
Universal Verification Methodology (UVM)
UVM Register Abstraction Layer (RAL)

Scripting & Automation

Bash
Python

Version Control & Project Tools

Git
Perforce
JIRA

Protocols & IPs

DDR-DRAM, DDR PHY, DFI
USB PD Controller
RTC
AMBA (APB, AHB)
I2C, SPI
PCIe (Basics Knowledge)

Simulation & EDA Tools

Synopsys VCS
Synopsys Verdi
Cadence Xcelium
Cadence SimVision
Cadence vManager
ModelSim

Education

BRAC University — M.Sc. in Electrical & Electronic Engineering

Expected 2025 · Dhaka, Bangladesh

BRAC University — B.Sc. in Electrical & Electronic Engineering

2016-2020 · Dhaka, Bangladesh · CGPA: 3.51

Training & Certifications

Gate-Level Simulation Training, VLSIGuru (2025) — GLS fundamentals, testbench setup, SDF timing, and power-aware verification basics.
UVM-Based Verification Training, Ulkasemi (2022) — IP testbench architecture, coverage-driven verification, Python regression automation.

Research

Google Scholar: View Profile

Research Gate: Md-Kamrul-Islam-6

Islam, M. K., Shawon, M. M. H., Akter, S., & Ahmed, S. (2020). Outdoor performance analysis and prediction of photovoltaic modules using machine learning algorithm. [Undergraduate thesis, Brac University]. BracU Institutional Repository.
Ahmed, S., Islam, M. K., Islam, M., & Rahman, M. M. (2020). Short-term performance investigation of solar PV module: A machine learning based approach. In 2020 IEEE 8th R10 Humanitarian Technology Conference (R10-HTC) (pp. 1–6). IEEE.
Hasan Shawon, M. M., Akter, S., Islam, M. K., Ahmed, S., & Rahman, M. M. (2020). Forecasting PV panel output using Prophet time series machine learning model. In 2020 IEEE Region 10 Conference (TENCON) (pp. 1141–1144). IEEE.
Akter, S., Shawon, M. M. H., Islam, M. K., Ahmed, S., & Rahman, M. M. (2020). Degradation of PV module performance due to dust accumulation on high-rise buildings. In 2020 IEEE International Women in Engineering (WIE) Conference on Electrical and Computer Engineering (WIECON-ECE) (pp. 239–242). IEEE.